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Renesas Electronics /R7FA6T2BD /GPT324 /GTINTAD

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Interpret as GTINTAD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SCFA 0 (0)SCFB 0 (0)SCFC 0 (0)SCFD 0 (0)SCFE 0 (0)SCFF 0 (0)SCFPO 0 (0)SCFPU 0 (0)ADTRAUEN 0 (0)ADTRADEN 0 (0)ADTRBUEN 0 (0)ADTRBDEN 0 (00)GRP0 (0)GRPDTE 0 (0)GRPABH 0 (0)GRPABL

SCFF=0, SCFA=0, GRPABL=0, ADTRADEN=0, GRP=00, SCFD=0, GRPABH=0, SCFB=0, ADTRBDEN=0, SCFE=0, ADTRAUEN=0, GRPDTE=0, SCFPU=0, SCFC=0, ADTRBUEN=0, SCFPO=0

Description

General PWM Timer Interrupt Output Setting Register

Fields

SCFA

GTCCRA Register Compare Match/Input Capture Source Synchronous Clear Enable

0 (0): Disable use of GTCCRA register compare match/input capture as a clear factor for other channels.

1 (1): Enable use of GTCCRA register compare match/input capture as a clear factor for other channels.
SCFB

GTCCRB Register Compare Match/Input Capture Source Synchronous Clear Enable

0 (0): Disable use of GTCCRB register compare match/input capture as a clear factor for other channels.

1 (1): Enable use of GTCCRB register compare match/input capture as a clear factor for other channels.
SCFC

GTCCRC Register Compare Match Source Synchronous Clear Enable

0 (0): Disable use of GTCCRC register compare match as a clear factor for other channels.

1 (1): Enable use of GTCCRC register compare match as a clear factor for other channels.
SCFD

GTCCRD Register Compare Match Source Synchronous Clear Enable

0 (0): Disable use of GTCCRD register compare match as a clear factor for other channels.

1 (1): Enable use of GTCCRD register compare match as a clear factor for other channels.
SCFE

GTCCRE Register Compare Match Source Synchronous Clear Enable

0 (0): Disable use of GTCCRE register compare match as a clear factor for other channels.

1 (1): Enable use of GTCCRE register compare match as a clear factor for other channels
SCFF

GTCCRF Register Compare Match Source Synchronous Clear Enable

0 (0): Disable use of GTCCRF register compare match as a clear factor for other channels.

1 (1): Enable use of GTCCRF register compare match as a clear factor for other channels
SCFPO

Overflow Source Synchronous Clear Enable

0 (0): Disable use of overflow as a clear factor for other channels.

1 (1): Enable use of overflow as a clear factor for other channels.
SCFPU

Underflow Source Synchronous Clear Enable

0 (0): Disable use of underflow as a clear factor for other channels

1 (1): Enable use of underflow as a clear factor for other channels
ADTRAUEN

GTADTRA Register Compare Match (Up-Counting) A/D Conversion Start Request Enable

0 (0): A/D conversion start request is disabled.

1 (1): A/D conversion start request is enabled.
ADTRADEN

GTADTRA Register Compare Match (Down-Counting) A/D Conversion Start Request Enable

0 (0): A/D conversion start request is disabled.

1 (1): A/D conversion start request is enabled.
ADTRBUEN

GTADTRB Register Compare Match (Up-Counting) A/D Conversion Start Request Enable

0 (0): A/D conversion start request is disabled.

1 (1): A/D conversion start request is enabled.
ADTRBDEN

GTADTRB Register Compare Match (Down-Counting) A/D Conversion Start Request Enable

0 (0): A/D conversion start request is disabled.

1 (1): A/D conversion start request is enabled.
GRP

Output Disable Source Select

0 (00): Group A output disable source is selected Group B output disable source is selected Group C output disable source is selected Group D output disable source is selected
GRPDTE

Dead Time Error Output Disable Request Enable

0 (0): Dead time error output disable request is disabled.

1 (1): Dead time error output disable request is enabled.
GRPABH

Same Time Output Level High Disable Request Enable

0 (0): Same time output level high disable request disabled

1 (1): Same time output level high disable request enabled
GRPABL

Same Time Output Level Low Disable Request Enable

0 (0): Same time output level low disable request disabled

1 (1): Same time output level low disable request enabled

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Register License

This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all applicable laws, including copyright laws.

THIS SOFTWARE IS PROVIDED “AS IS” AND RENESAS MAKES NO WARRANTIES REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of this software. By using this software, you agree to the additional terms and conditions found by accessing the following link: http://www.renesas.com/disclaimer

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data